Massive Parallelism in the TeraOPS Chip

Ambric, a Portland semiconductor startup, believes the key to massive parallelism in a high performance programmable chip is to define the right programming model first, then develop silicon architecture and tools to implement that model. In this talk, Mike Butts, Ambric, Inc., talks about Ambric's new chip that harnesses hundreds of 32-bit CPUs and memories in an power-efficient asynchronous system that is sensible to program and delivers up to one teraOPS performance.